Clock synchronization is the main technology in a digital network for achieving network synchronization, and usually a master-slave synchronization mode is adopted. A series of hierarchical clocks are adopted in the master-slave synchronization mode, where a clock at each level is synchronized with a clock at a higher level, the clock at the highest level is usually referred to as a master clock, while the clock at a lower level is usually referred to as a slave clock.
In the clock synchronization process, the generation of a clock tracking loop needs to be prevented especially. The so-called clock tracking loop refers to a phenomenon of tracking, from the clock, a clock signal directly or indirectly coming from itself. In the prior art, quality level do not use information QL_DNU in a standard SSM (Synchronization Status Message, synchronization status message) is usually used for preventing the generation of the clock tracking loop, i.e. a reverse sending DNU (Do Not Use) function suggested in ITU-T standard G.8264 and G.781. The SSM shows a clock quality level, and the clock quality level is divided into five levels:
QualitySSM Lower 4 bits CodingLevel (QL)[MSB . . . LSB]PriorityQL-PRC0010highestQL-SSU-A0100higherQL-SSU-B1000highQL-SEC/EEC1011lowQL-DNU1111Lowest (This quality levelcannot be used forsynchronization)
The above five clock quality levels arranged sequentially from top to bottom are arranged from high to low. That is, the clock quality level of a clock source carrying QL-PRC SSM information is higher than that of a clock source carrying QL-SSU-A SSM information. If there are multiple selectable clock sources in a network element, the clock source with a higher quality level will be selected preferentially for tracking.
FIG. 1A shows a schematic diagram of implementing clock synchronization by a network element which does not adopt a reverse sending DNU function in the prior art. In the figure, an active clock and a standby clock of network elements NE1 and NE2 respectively come from two clock signals labeled {circle around (1)} and {circle around (2)}. Let two clock signals be signals generated by clock sources of QL-PRC level, and let NE2 do not adopt the reverse sending DNU function, then under normal circumstances, the clock signal labeled {circle around (1)} is tracked for both timing of NE1 and NE2. Now if the clock quality of the clock signal labeled {circle around (1)} which is received by NE1 is declined (such as declined to QL-SSU-A level), NE1 will automatically select the clock signal labeled {circle around (2)} which comes from NE2 as the clock source according to the priority (QL-PRC>QL-SSU-A), but in fact, NE2 has always been tracking the clock signal labeled {circle around (1)} which comes from NE1 as the clock source, obviously, a clock tracking loop is generated.
FIG. 1B shows a schematic diagram of implementing clock synchronization by a network element which adopts a reverse sending DNU function in the prior art. What is different from FIG. 1A is that, NE2 adopts the reverse sending DNU function, that is, when NE2 tracks the clock signal labeled {circle around (1)} which comes from NE1 as the clock source, the clock quality level of the clock signal labeled {circle around (2)} which comes from NE2 and is received by NE1 will be QL-DNU rather than QL-PRC. Now if the clock quality of the clock signal labeled {circle around (1)} which is received by NE1 is declined (such as declined to QL-SSU-A level), NE1 will still select the clock signal labeled {circle around (1)} as the clock source according to the priority (QL-SSU-A>QL-DNU), meanwhile the clock quality level of the clock signal labeled {circle around (1)}, which is sent to NE2 by NE1, will become QL-SSU-A from QL-PRC; then NE2 finds that the clock quality of the clock signal labeled {circle around (1)} which comes from NE1 is declined, and thus switches to the clock signal labeled {circle around (2)} according to the priority (QL-PRC>QL-SSU-A), and meanwhile the clock quality level of the clock signal labeled {circle around (2)}, which is sent to NE1 by NE2, will also become QL-PRC from QL-DNU, at this time NE1 automatically selects the clock signal labeled {circle around (2)} which comes from NE2 as the clock source according to the priority (QL-PRC>QL-SSU-A). In this process, no clock tracking loop will be generated.
However, the above method can be used for avoiding a clock tracking loop only in environments such as the environment that only one bidirectional clock tracking link exists between two network elements, which is shown in FIG. 1; when there are two or more bidirectional clock tracking links between two network elements, the above method cannot effectively avoid the generation of the clock tracking loop.